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general description the max32630/max32631 is an arm ? cortex ? -m4f 32-bit microcontroller with a floating point unit, ideal for the emerging category of wearable medical and fitness applications. the architecture combines ultra-low power high-efficiency signal processing functionality with signifi - cantly reduced power consumption and ease of use. the device features four powerful and flexible power modes. a peripheral management unit (pmu) enables intelligent peripheral control with up to six channels to significantly reduce power consumption. built-in dynamic clock gating and firmware-controlled power gating allows the user to optimize power for the specific application. multiple spi, uart and i 2 c serial interfaces, as well as 1-wire ? mas - ter and usb, allow for interconnection to a wide variety of external sensors. a four-input, 10-bit adc with selectable references is available to monitor analog input from exter - nal sensors and meters. the small 100-ball wlp package provides a tiny, 4.37mm x 4.37mm footprint. the max32630/max32631 include a hardware aes engine. the max32631 is a secure version of the max32630. it incorporates a trust protection unit (tpu) with encryption and advanced security features. these features include a modular arithmetic accelerator (maa) for fast ecdsa, a hardware prng entropy generator, and a secure boot loader. applications sports watches fitness monitors wearable medical patches portable medical devices sensor hubs beneits and features high-efficiency microcontroller for wearable devices ? internal oscillator operates up to 96mhz ? low power 4mhz oscillator system clock option for always-on monitoring applications ? 2mb flash memory ? 512kb sram ? 8kb instruction cache ? 1.2v core supply voltage ? 1.8v to 3.3v i/o ? optional 3.3v 5% usb supply voltage power management maximizes uptime for battery applications? 106a/mhz active current executing from cache ? wakeup to 96mhz clock or 4mhz clock ? 600na low power mode (lp0) current with rtc enabled ? 3.5w ultra-low power data retention sleep mode (lp1) with fast 5s wakeup to 96mhz optimal peripheral mix provides platform scalability ? spix execute in place (xip) engine for memory expansion with minimal footprint ? three spi masters, one spi slave ? four uarts ? three i 2 c masters, one i 2 c slave ? 1-wire master ? full-speed usb 2.0 engine with internal transceiver ? sixteen pulse train (pwm) engines ? six 32-bit timers and 3 watchdog timers ? up to 66 general-purpose i/o pins ? one 10-bit delta-sigma adc operating at 7.8ksps ? aes-64, -128, -256 ? cmos-level 32khz rtc output secure valuable ip and data with robust internal hardware security (max32631 only) ? trust protection unit (tpu) including maa sup- ports ecdsa and modular arithmetic ? prng seed generator ? secure boot loader ordering information appears at end of data sheet. arm is a registered trademark and registered service mark and cortex is a registered trademark of arm limited. 1-wire is a registered trademark of maxim integrated products, inc. 19-8478; rev 0; 3/16 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables evaluation kit available downloaded from: http:///
simpliied block diagram max32630/max32631 bus matrix C ahb, apb, ibus, dbus arm cortex-m4f 96mhz nvic jtag swd (serial wire debug) por, brownout monitor, supply voltage monitors voltage regulation and power control clock generation 96mhz int osc/ system clock usb 2.0 full speed controller memory 2mb flash 512kb sram 8kb cache peripheral management unit 3 windowed watchdog timers crc 16/32 rtc and wake up timers trust protection unit (tpu) 10-bit ? adc ain0 ain1 ain2 ain3 v ddb v rtc tck/swclk tms/swdio tdo tdi rstn srstn v dd12 v dd18 v rtc v ss 32kout 32kin dp dm v ddb up to 66 gpio/special function max32631 only gpio with interrupts aes-128,-192,- 256 maa unique id secure nv key prng 5 5 4 v dd12 2 6 32 bit timers 16 pulse train engine 3 spi master 32b fifos 1 spi xip 3 i 2 c master 1 i 2 c slave maximum of 3 ports 16b fifos 4 uart 32b fifos 1-wire master 1 spi slave v dd18 v ddioh shared pad functions timers/pwm capture/compare usb spi spi xip i 2 c uart 1-wire rtc output external interrupts v ddio v dda v ssa v ref ext ref 1.2v www.maximintegrated.com maxim integrated 2 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(all voltages with respect to v ss , unless otherwise noted.) v dd18 ................................................................. -0.3v to +1.89v v dd12 ................................................................. -0.3v to +1.26v v dda relative to v ssa ........................................ -0.3v to +1.89v v rtc ................................................................... -0.3v to +1.89v v ddb .................................................................... -0.3v to +3.6v v ref ..................................................................... -0.3v to +3.6v 32kin, 32kout .................................................... -0.3v to +3.6v rstn, srstn, dp, dm, gpio, jtag ................. -0.3v to +3.6v ain[1:0]................................................................. -0.3v to +5.5v ain[3:2]................................................................. -0.3v to +3.6v v ddio ................................................................... -0.3v to +3.6v v ddioh ................................................................. -0.3v to +3.6v total current into all v dd18 power pins (sink) ................ 100ma total current into v ss ...................................................... 100ma output current (sink) by any i/o pin ..................................25ma output current (source) by any i/o pin ............................ -25ma operating temperature range ........................... -20c to +85c storage temperature range ............................ -65c to +150c soldering temperature (reflow) ....................................... +260c 100 wlp package code w1004d4+1 outline number 21-0452 land pattern number refer to application note 1891 thermal resistance, single-layer board junction-to-ambient ( ja ) n/a junction-to-case thermal resistance ( jc ) n/a thermal resistance, four-layer boardjunction-to-ambient ( ja ) 38.9c/w junction-to-case thermal resistance ( jc ) n/a package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package information www.maximintegrated.com maxim integrated 3 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(limits are 100% tested at t a = +25 c and t a = +85c. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. specifications marked gbd are guaranteed by design and not production tested. specifications to -20c are guaranteed by design and are not production tested.) parameter symbol conditions min typ max units supply voltage v dd18 1.71 1.8 1.89 v v dd12 1.14 1.2 1.26 v dda 1.71 1.8 1.89 v rtc 1.75 1.8 1.89 v ddio 1.71 1.8 3.6 v ddioh v ddioh must be v ddio 1.71 1.8 3.6 power fail reset voltage v rst monitors v dd18 1.62 1.7 v power-on reset voltage v por monitors v dd18 1.5 v ram data retention voltage v drv 0.93 v v dd12 dynamic current, lp3 mode i dd12_dlp3 measured on the v dd12 pin and execut- ing code from cache memory, all inputs are tied to v ss or v dd18 , outputs do not source/sink any current, pmu disabled 106 a/mhz v dd12 fixed current, lp3 mode i dd12_flp3 measured on the v dd12 pin and execut- ing code from cache memory, all inputs are tied to v ss or v dd18 , outputs do not source/sink any current, 96mhz oscillator selected as system clock 173 a measured on the v dd12 pin and execut- ing code from cache memory, all inputs are tied to v ss or v dd18 , outputs do not source/sink any current, 4mhz oscillator selected as system clock 72 v dd18 fixed current, lp3 mode i dd18_flp3 measured on the v dd18 + v dda device pins and executing code from cache mem- ory, all inputs are tied to v ss or v dd18 , outputs do not source/sink any current, 96mhz oscillator selected as system clock 366 a measured on the v dd18 + v dda device pins and executing code from cache mem- ory, all inputs are tied to v ss or v dd18 , outputs do not source/sink any current, 4mhz oscillator selected as system clock 33 v dd12 dynamic current, lp2 mode i dd12_dlp2 measured on the v dd12 pin, arm in sleep mode, pmu with two channels active 27 a/mhz electrical characteristics www.maximintegrated.com maxim integrated 4 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(limits are 100% tested at t a = +25 c and t a = +85c. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. specifications marked gbd are guaranteed by design and not production tested. specifications to -20c are guaranteed by design and are not production tested.) parameter symbol conditions min typ max units v dd12 fixed current, lp2 mode i dd12_flp2 measured on the v dd12 pin, arm in sleep mode, pmu with two channels active, 96mhz oscillator selected as system clock 173 a measured on the v dd12 pin, arm in sleep mode, pmu with two channels active, 4mhz oscillator selected as system clock 72 v dd18 fixed current, lp2 mode i dd18_flp2 measured on the v dd18 + v dda device pins, arm in sleep mode, pmu with two channels active, 96mhz oscillator selected as system clock 366 a measured on the v dd18 + v dda device pins. arm in sleep mode, pmu with two channels active, 4mhz oscillator selected as system clock 33 v dd12 fixed current, lp1 mode i dd12_flp1 standby state with full data retention 1.86 a v dd18 fixed current, lp1 mode i dd18_flp1 standby state with full data retention 120 na v rtc fixed current, lp1 mode i ddrtc_flp1 rtc enabled, retention regulator powered by v dd12 505 na v dd12 fixed current, lp0 mode i dd12_flp0 14 na v dd18 fixed current, lp0 mode i dd18_flp0 120 na v rtc fixed current, lp0 mode i ddrtc_flp0 rtc enabled 505 na rtc disabled 105 lp2 mode resume time t lp2_on 0 s lp1 mode resume time t lp1_on 5 s lp0 mode resume time t lp0_on polling lash ready 11 s jtag input low voltage for tck, tms, tdi v il 0.3 x v ddio v input high voltage for tck, tms, tdi v ih 0.7 x v ddio v output low voltage for tdo v ol 0.2 0.4 v output high voltage for tdo v oh v ddio - 0.4 electrical characteristics (continued) www.maximintegrated.com maxim integrated 5 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(limits are 100% tested at t a = +25 c and t a = +85c. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. specifications marked gbd are guaranteed by design and not production tested. specifications to -20c are guaranteed by design and are not production tested.) parameter symbol conditions min typ max units clocks system clock frequency f ck 0.001 98 mhz system clock period t ck 1/f ck ns internal relaxation oscillator frequency f intclk factory default 94 96 98 mhz firmware trimmed, required for usb com- pliance 95.76 96 96.24 internal rc oscillator frequency f rcclk 3.9 4 4.1 mhz rtc input frequency f 32kin 32khz watch crystal 32.768 khz rtc operating current i rtc_lp23 lp2 or lp3 mode 0.7 a i rtc_lp01 lp0 or lp1 mode 0.35 rtc power-up time t rtc_ on 250 ms general-purpose i/o input low voltage for all gpio pins v il v ddio selected as i/o supply 0.3 v ddio v v ddioh selected as i/o supply 0.3 v ddioh input low voltage for rstn v il 0.3 x v rtc v input low voltage for srstn v il 0.3 x v ddio input high voltage for all gpio pins v ih v ddio selected as i/o supply 0.7 v ddio v v ddioh selected as i/o supply 0.7 v ddioh input high voltage for rstn v ih 0.7 x v rtc v input high voltage for srstn v ih 0.7 x v ddio v input hysteresis (schmitt) v ihys 300 mv output low voltage for all gpio pins v ol v ddio = v ddioh = 1.71v, v ddio selected as i/o supply, i ol = 4ma, normal drive coniguration 0.2 0.4 v v ddio = v ddioh = 1.71v, v ddio selected as i/o supply , i ol = 24ma, fast drive con- iguration 0.2 0.4 v ddio = 1.71v v ddioh = 2.97v, v ddioh selected as i/o supply, i ol = 300a 0.2 0.45 electrical characteristics (continued) www.maximintegrated.com maxim integrated 6 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(limits are 100% tested at t a = +25 c and t a = +85c. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. specifications marked gbd are guaranteed by design and not production tested. specifications to -20c are guaranteed by design and are not production tested.) parameter symbol conditions min typ max units combined i ol , all gpio pins i ol_total 48 ma output high voltage for all gpio pins v oh i oh = -2ma, v ddio = v ddioh = 1.71v, v ddio selected as i/o supply, normal drive coniguration v ddio - 0.4 v i oh = -8ma, v ddio = v ddioh = 1.71v, vddio selected as i/o supply, fast drive coniguration v ddio - 0.4 i oh = -300a, v ddioh = 3.6v, v ddioh selected as i/o supply v ddioh - 0.45 ouput high voltage for all gpio pins v oh v ddio = 1.71v, v ddioh = 3.6v. v ddio selected as i/o supply, i oh = -2ma v ddio - 0.45 v combined i oh , all gpio pins i oh_total -48 ma input/output pin ca- pacitance for all pins c io 3 pf input leakage current low i il v ddio = 1.89v, v ddioh = 3.6v, v ddioh selected as i/o supply, v in = 0v, internal pullup disabled -100 +100 na input leakage current high i ih v ddio = 1.89v, v ddioh = 3.6v, v ddioh selected as i/o supply, v in = 3.6v, internal pulldown disabled -100 +100 na i off v ddio = 0v, v ddioh = 0v, v ddio selected as i/o supply, v in < 1.89v -1 +1 a i ih3v v ddio = v ddioh = 1.71v, v ddio selected as i/o supply, v in = 3.6v -2 +2 input pullup resistor rstn, srstn, tms, tck, tdi r pu 25 k input pullup/pulldown resistor for all gpio pins r pu1 normal resistance 25 k r pu2 highest resistance 1 m flash memory page size 2mb lash 8 kb flash erase time t m_erase mass erase 30 ms t p_erase page erase 30 flash programming time per word t prog 60 s flash endurance 10 kcycles data retention t ret t a = +85c 10 years electrical characteristics (continued) www.maximintegrated.com maxim integrated 7 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(internal bandgap reference selected, adc_scale = adc_refscl = 1, unless otherwise specified. specifications marked gbd are guaranteed by design and not production tested.) parameter symbol conditions min typ max units resolution 10 bits adc clock rate f aclk 0.1 8 mhz adc clock period t aclk 1/f aclk s input voltage range v ain ain[3:0], adc_chsel = 0C3, buf_by- pass = 0 0.05 v dda - 0.05 v ain[1:0], adc_chsel = 4C5, buf_by- pass = 0 0.05 5.5 ain[3:0], adc_chsel = 0C3, buf_by- pass = 1 v ssa v dda ain[1:0], adc_chsel = 4C5, buf_by- pass = 1 v ssa 5.5 input impedance r ain ain[1:0], adc_chsel = 4-5, adc active 45 k input dynamic current i ain switched capactiance input current, adc active, adc buffer bypassed 4.5 a switched capacitance input current, adc active, adc buffer enabled 50 na analog input capacitance c ain fixed capacitance to v ssa 1 pf dynamically switched capacitance 250 ff integral nonlinearity inl 2 lsb differential nonlinearity dnl 1 lsb offset error v os 1 lsb gain error ge 2 lsb signal to noise ratio snr 58.5 db signal to noise and distortion sinad 58.5 db total harmonic distortion thd 68.5 db spurious free dynamic range sfdr 74 db adc active current i adc adc active, reference buffer enabled, input buffer disabled 240 a input buffer active current i inbuf 53 a adc electrical characteristics www.maximintegrated.com maxim integrated 8 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(internal bandgap reference selected, adc_scale = adc_refscl = 1, unless otherwise specified. specifications marked gbd are guaranteed by design and not production tested.) parameter symbol conditions min typ max units adc setup time t adc_su any powerup of: adc clock, adc bias, reference buffer or input buffer to cpuadcstart 10 s any power-up of: adc clock or adc bias to cpuadcstart 48 t aclk adc output latency t adc 1025 t aclk adc sample rate f adc 7.8 ksps adc input leakage i adc_leak ain0 or ain1, adc inactive or channel not selected 0.12 4 na ain2 or ain3, adc inactive or channel not selected. 0.02 1 ain0/ain1 resistor divider error adc_chsel = 4 or 5, not including adc offset/gain error 2 lsb full-scale voltage v fs adc code = 0x3ff 1.2 v external reference voltage v ref_ext adc_xref = 1 1.17 1.23 1.29 v bandgap temperature coeficient v tempco box method 30 ppm reference dynamic current i ref_ext adc_xref = 1, adc active 4.1 a reference input capacitance c refin dynamically switched capacitance, adc_ xref = 1, adc active 250 ff adc electrical characteristics (continued) www.maximintegrated.com maxim integrated 9 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(guaranteed by design and not production tested.) parameter symbol conditions min typ max units operating frequency f mck 48 mhz sclk period t mck 1/f mck ns sclk output pulse-width high/low t mch , t mcl t mck /2 ns mosi output hold time after sclk sample edge t moh t mck /2 ns mosi output valid to sample edge t mov t mck /2 ns miso input valid to sclk sample edge setup t mis 3 ns miso input to sclk sample edge t mih 0 ns figure 1. spi master/spix master communications timing diagram ss sclk ckpol/ ckpha 0/1 or 1/0 sclk ckpol/ ckpha 0/0 or 1/1 mosi/ sdio (output) lsb lsb shift sample shift sample msb msb-1 msb msb-1 t mck t mch t mcl t mch t moh t mov t mlh t mis t mih miso/ sdio (input) spi master/spix master electrical characteristics spi timing: www.maximintegrated.com maxim integrated 10 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(ac electrical specifications are guaranteed by design and are not production tested, v dd18 = v rst to 1.89v, v ddb = 3.63v, t a =-20c to +85c, guaranteed by design and not production tested.) (guaranteed by design and not production tested.) parameter symbol conditions min typ max units usb phy supply volt- age v ddb 2.97 3.3 3.63 v single-ended input high voltage dp, dm v ihd 2 v single-ended input low voltage dp, dm v ild 0.8 v output low voltage dp, dm v old r l = 1.5k from dp to 3.6v 0.3 v output high voltage dp, dm v ohd r l = 15k from dp and dm to v ss 2.8 v differential input sensi- tivity dp, dm v di dp to dm 0.2 v common-mode voltage range v cm includes v di range 0.8 2.5 v single-ended receiver threshold v se 0.8 2.0 v single-ended receiver hysteresis v seh 200 mv differential output sig- nal cross-point voltage v crs c l = 50pf 1.3 2.0 v dp, dm off-state input impedance r lz 300 k driver output imped- ance r drv steady-state drive 28 44 dp pull-up resistor r pu idle 0.9 1.575 k receiving 1.425 3.09 parameter symbol conditions min typ max units dp, dm rise time (transmit) t r c l = 50pf 4 20 ns dp, dm fall time (transmit) t f c l = 50pf 4 20 ns rise/fall time matching (transmit) t r ,t f c l = 50pf 90 110 % usb timing electrical characteristics usb electrical characteristics www.maximintegrated.com maxim integrated 11 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(guaranteed by design and not production tested.) parameter symbol conditions min typ max units scl clock frequency f scl standard mode 100 khz fast mode 400 input high voltage v ih_i2c fast mode, v ddio selected as i/o supply 0.7 v ddio v fast mode, v ddioh selected as i/o supply 0.7 v ddioh standard mode, v ddio selected as i/o supply 0.7 v ddio standard mode, v ddioh selected as i/o supply 0.7 v ddioh input low voltage v il_i2c fast mode, v ddio selected as i/o supply 0.3 v ddio v fast mode, v ddioh selected as i/o supply 0.3 v ddioh standard mode, v ddio selected as i/o supply 0.3 v ddio standard mode, v ddioh selected as i/o supply 0.3 v ddioh input hysteresis (schmitt) v ihys_i2c fast-mode 300 mv output logic-low (open drain or open collector) v ol_i2c v ddio = v ddioh = 1.71v, v ddio selected as i/o supply, i ol = 4ma, normal drive coniguration 0.2 0.4 v v ddio = 1.71v v ddioh = 2.97v, v ddioh selected as i/o supply, i ol = 300a 0.2 0.45 electrical characteristics - i 2 c bus www.maximintegrated.com maxim integrated 12 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
(v dd12 = 1.2v, v dd18 = 1.8v) 0 2 4 6 8 10 12 0 20 40 60 80 100 i dd12 (ma) frequency (mhz) i dd12 vs. frequency (internal 96mhz oscillator) toc01 v dd12 = 1.2v 0 100 200 300 400 500 600 0 1 2 3 4 i dd12 ( a) frequency (mhz) i dd12 vs. frequency (internal 4mhz oscillator) toc02 v dd12 = 1.2v 0 2 4 6 8 10 12 14 0 20 40 60 80 100 total power (mw) frequency (mhz) total power vs. frequency (internal 96mhz oscillator) toc03 lp3 lp2 total power = (i dd18 x 1.8v) + (i dd12 x 1.2v) 0 100 200 300 400 500 600 700 0 1 2 3 4 total power ( w) frequency (mhz) total power vs. frequency (internal 4mhz oscillator) toc04 lp2 lp3 total power = (i dd18 x 1.8v) + (i dd12 x 1.2v) typical operating characteristics maxim integrated 13 www.maximintegrated.com max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
n.c. v ssa v ref ain0 ain1 ain2 ain3 v dd18 p8.1 rstn v dda tck tms tdo tdi v ss p8.0 p0.0 p6.0 p5.7 p5.5 p5.4 p5.2 v rtc p7.7 p0.5 p0.3 p0.2 p5.6 p5.3 p5.0 v ddb p7.6 p0.7 p0.6 p1.1 p1.5 p3.1 p5.1 dp p7.5 p1.3 p1.2 p1.4 p3.0 p3.5 p3.7 dm p7.4 p1.6 p1.7 p2.4 p2.6 p3.4 p4.4 p4.6 p7.3 p2.1 p2.2 p2.5 p2.7 p3.2 p4.1 p4.3 p7.2 p2.0 p2.3 v dd18 v ss p3.3 p3.6 p4.0 1 2 3 4 5 6 7 8 ab cd e f g h j + top view (bumps on bottom) n.c. 32kin 32kout v ss v ddio p4.7 p4.5 p4.2 p6.1 9 10 n.c. p7.0 p6.7 p6.6 p6.5 p6.4 p6.3 p6.2 k n.c. v ddioh srstn p0.1 p0.4 p1.0 v dd12 v ss v ddio v ss p7.1 100 wlp pin coniguration 100-wlp www.maximintegrated.com maxim integrated 14 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
bump name function power pins d9 v ddb usb transceiver supply voltage. this pin must be bypassed to v ss with a 1.0f capacitor as close as possible to the package. f2 v dd12 1.2v nominal supply voltage. this pin must be bypassed to v ss with a 1.0f capacitor as close as possible to the package. c9 v rtc rtc supply voltage. this pin must be bypassed to v ss with a 1.0f capacitor as close as possible to the package. b4 v dda analog supply voltage. this pin must be bypassed to v ssa with a 1.0f capacitor as close as pos - sible to this pin. j5, a9 v dd18 1.8v supply voltage. this pin must be bypassed to v ss with a 1.0f capacitor as close as possible to the package. h2, e10 v ddio i/o supply voltage. 1.8v v ddio 3.6v. see ec table for v ddio speciication. this pin must be bypassed to v ss with a 1.0f capacitor as close as possible to the package. a2 v ddioh i/o supply voltage, high. 1.8v v ddioh 3.6v, always with v ddioh v ddio . see ec table for v ddioh speciication. this pin must be bypassed to vss with a 1.0f capacitor as close as pos - sible to the package. a4 v ref adc reference. this pin must be left unconnected if an external reference is not used. b9, d10, g2, j6, j2 v ss digital ground a3 v ssa analog ground clock pins c10 32kout 32khz crystal oscillator output b10 32kin 32khz crystal oscillator input. connect a 6pf 32khz crystal between 32kin and 32kout for rtc operation. optionally, an external clock source can be driven on 32kin if the 32kout pin is left unconnected. a 32khz crystal or external clock source is required for proper usb operation. usb pins e9 dp usb dp signal. this bidirectional pin carries the positive differential data or single-ended data. this pin is weakly pulled high internally when the usb is disabled. f9 dm usb dm signal. this bidirectional pin carries the negative differential data or single-ended data. this pin is weakly pulled high internally when the usb is disabled. jtag pins b5 tck/swclk jtag clock or serial wire debug clock. this pin has an internal 25k pullup to v ddio . b6 tms/swdio jtag test mode select or serial wire debug i/o. this pin has an internal 25k pullup to v ddio . b7 tdo jtag test data output b8 tdi jtag test data input. this pin has an internal 25k pullup to v ddio . bump description www.maximintegrated.com maxim integrated 15 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
bump name function reset pins b3 rstn hardware power reset (active-low) input. the device remains in reset while this pin is in its active state. when the pin transitions to its inactive state, the device performs a por reset (resetting all logic on all supplies except for real-time clock circuitry) and begins execution. this pin is internally connected with an internal 25k pullup to the v rtc supply. this pin should be left unconnected if the system design does not provide a reset signal to the device. b2 srstn software reset, active-low input/output. the device remains in software reset while this pin is in its active state. when the pin transitions to its inactive state, the device performs a reset to the arm core, digital registers and peripherals (resetting most of the core logic on the v dd12 supply). this reset does not affect the por only registers, rtc logic, arm debug engine or jtag debugger al- lowing for a soft reset without having to reconigure all registers. after the device senses srstn as a logic 0, the pin automatically reconigures as an output sourc - ing a logic 0. the device continues to output for 6 system clock cycles and then repeats the input sensing/output driving until srstn is sensed inactive. this pin is internally connected with an internal 25k pullup to the v ddio supply. this pin should be left unconnected if the system design does not provide a reset signal to the device. general-purpose i/o and special functions (see the applications information section for gpio matrix) c3 p0.0 gpio port 0.0 c2 p0.1 gpio port 0.1 d5 p0.2 gpio port 0.2 d4 p0.3 gpio port 0.3 d2 p0.4 gpio port 0.4 d3 p0.5 gpio port 0.5 e4 p0.6 gpio port 0.6 e3 p0.7 gpio port 0.7 e2 p1.0 gpio port 1.0 e5 p1.1 gpio port 1.1 f4 p1.2 gpio port 1.2 f3 p1.3 gpio port 1.3 f5 p1.4 gpio port 1.4 e6 p1.5 gpio port 1.5 g3 p1.6 gpio port 1.6 g4 p1.7 gpio port 1.7 j3 p2.0 gpio port 2.0 h3 p2.1 gpio port 2.1 h4 p2.2 gpio port 2.2 j4 p2.3 gpio port 2.3 g5 p2.4 gpio port 2.4 h5 p2.5 gpio port 2.5 g6 p2.6 gpio port 2.6 bump description (continued) www.maximintegrated.com maxim integrated 16 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
bump name function h6 p2.7 gpio port 2.7 f6 p3.0 gpio port 3.0 e7 p3.1 gpio port 3.1 h7 p3.2 gpio port 3.2 j7 p3.3 gpio port 3.3 g7 p3.4 gpio port 3.4 f7 p3.5 gpio port 3.5 j8 p3.6 gpio port 3.6 f8 p3.7 gpio port 3.7 j9 p4.0 gpio port 4.0 h8 p4.1 gpio port 4.1 h10 p4.2 gpio port 4.2 h9 p4.3 gpio port 4.3 g8 p4.4 gpio port 4.4 g10 p4.5 gpio port 4.5 g9 p4.6 gpio port 4.6 f10 p4.7 gpio port 4.7 d8 p5.0 gpio port 5.0 e8 p5.1 gpio port 5.1 c8 p5.2 gpio port 5.2 d7 p5.3 gpio port 5.3 c7 p5.4 gpio port 5.4 c6 p5.5 gpio port 5.5 d6 p5.6 gpio port 5.6 c5 p5.7 gpio port 5.7 c4 p6.0 gpio port 6.0 j10 p6.1 gpio port 6.1 k9 p6.2 gpio port 6.2 k8 p6.3 gpio port 6.3 k7 p6.4 gpio port 6.4 k6 p6.5 gpio port 6.5 k5 p6.6 gpio port 6.6 k4 p6.7 gpio port 6.7 k3 p7.0 gpio port 7.0 k2 p7.1 gpio port 7.1 j1 p7.2 gpio port 7.2 h1 p7.3 gpio port 7.3 g1 p7.4 gpio port 7.4 f1 p7.5 gpio port 7.5 bump description (continued) www.maximintegrated.com maxim integrated 17 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
bump name function e1 p7.6 gpio port 7.6 d1 p7.7 gpio port 7.7 c1 p8.0 gpio port 8.0 b1 p8.1 gpio port 8.1 a1 n.c. not connected. a10 n.c. not connected. k1 n.c. not connected. k10 n.c. not connected. analog input pins a5 ain0 adc input 0. 5v tolerant input. a6 ain1 adc input 1. 5v tolerant input. a7 ain2 adc input 2 a8 ain3 adc input 3 bump description (continued) www.maximintegrated.com maxim integrated 18 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
detailed description the max32630/max32631 is a low-power, mixed signal microcontroller based on the arm cortex-m4 32-bit core with a maximum operating frequency of 96mhz. the max32631 is a secure version of the max32630, incor - porating a trust protection unit (tpu) with encryption and advanced security features. application code executes from an onboard 2mb program flash memory, with up to 512kb sram available for gen - eral application use. an 8kb instruction cache improves execution throughput, and a transparent code scrambling scheme is used to protect customer intellectual property residing in the program flash memory. additionally, a spi execute in place (xip) external memory interface allows application code and data (up to 16mb) to be accessed from an external spi memory device. a 10-bit delta-sigma adc is provided with a multiplexer front end for four external input channels (two of which are 5v tolerant) and six internal channels. an onboard temperature sensor block allows direct die temperature measurement without requiring any external system components. dedicated divided supply input channels allow direct monitoring of onboard power supplies such as v dd12 , v dd18 , v ddb , and v rtc by the adc. built-in limit monitors allow converted input samples to be com - pared against user-configurable high and low limits, with an option to trigger an interrupt and wake the cpu from a low power mode if attention is required. a wide variety of communications and interface periph - erals are provided, including a usb 2.0 slave interface, three master spi interfaces, one slave spi interface, four uart interfaces with multidrop support, three master i 2 c interfaces, and a slave i 2 c interface. arm cortex-m4f processor the arm cortex-m4f processor is ideal for the emerging category of wearable medical and wellness applications. the architecture combines high-efficiency signal process - ing functionality with low power, low cost, and ease of use. the cortex-m4f dsp supports single instruction multiple data (simd) path dsp extensions, providing: four parallel 8-bit add/sub floating point single precision two parallel 16-bit add/sub two parallel macs 32- or 64-bit accumulate signed, unsigned, data with or without saturation analog-to-digital converter the 10-bit delta-sigma adc provides 4 external inputs and can also be configured to measure all internal power supplies. it operates at a maximum of 7.8ksps. ain0 and ain1 are 5v tolerant, making them suitable for monitoring batteries. an optional feature allows samples captured by the adc to be automatically compared against user-programmable high and low limits. up to four channel limit pairs can be configured in this way. the comparison allows the adc to trigger an interrupt (and potentially wake the cpu from a low-power sleep mode) when a captured sample goes outside the preprogrammed limit range. since this comparison is performed directly by the sample limit monitors, it can be performed even while the main cpu is suspended in a low power mode. the adc reference is selectable: internal bandgap external reference v dd18 . this option disables the reference buffer to minimize power consumption. pulse train engine sixteen independent pulse train generators provide either a square wave or a repeating pattern from 2 bits to 32 bits in length. the frequency of each enabled pulse train generator is also set separately, based on a divide down (divide by 2, divide by 4, divide by 8, etc.) of the input pulse train module clock. any single pulse train generator or any desired group of pulse train generators can be restarted at the beginning of their patterns and synchronized with one another ensur - ing simultaneous startup. additionally, each pulse train can operate in a single shot mode. www.maximintegrated.com maxim integrated 19 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
clocking scheme the high-frequency internal relaxation oscillator operates at a nominal frequency of 96mhz. it is the primary clock source for the digital logic and peripherals. select a 4mhz internal oscillator to optimize active power consump - tion. wakeup is possible from either the 4mhz internal oscillator or the 96mhz internal oscillator. an external 32.768khz timebase is required when using the rtc or usb features of the device. the time base can be gen - erated by attaching a 32khz crystal connected between 32kin and 32kout, or an external clock source can also be applied to the 32kin pin. the external clock source must meet the electrical/timing requirements in the ec table. the 32khz output can be directed out to pin p1.7 and remains active in all low power modes including lp0. interrupt sources the arm nested vector interrupt controller (nvic) pro - vides a high-speed, deterministic interrupt response, interrupt masking, and multiple interrupt sources. each peripheral is connected to the nvic and can have mul - tiple interrupt flags to indicate the specific source of the interrupt within the peripheral. 55 distinct interrupts can be grouped by firmware into 8 levels of priority (including internal and external interrupts). there are 9 interrupts for the gpio ports, one for each port. figure 2. max32630/max32631 clock scheme real-time clock power sequencer usb phy nano-ring oscillator ~8khz firmware frequency calibration divide by 2 core clock scaler arm cortex-m4 core internal 96mhz oscillator rtc oscillator internal 44mhz cryptographic oscillator tpu adc clock scaler adc xtal driver or external clock 32kin 32kout 32khz crystal gpio 1.7 32.768khz output clock 32khz always-on domain (96mhz sysclk only) 48mhz 15khzC96mhz 8mhz 44mhz trust protection unit (max32621 only) internal 4mhz oscillator clock scaler system clock select www.maximintegrated.com maxim integrated 20 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
real-time clock and wake-up timer a real-time clock (rtc) keeps the time of day in absolute seconds. the 32-bit seconds register can count up to approximately 136 years and be translated to calendar format by application software. a time-of-day alarm and independent subsecond alarm can cause an interrupt or wake the device from stop mode. the minimum wake-up interval is 244s. the v rtc supports sram retention in power mode lp0.crc module a crc hardware module is included to provide fast calcu - lations and data integrity checks by application software. the crc module supports both the crc-16-ccitt and crc-32 (x 32 + x 26 + x 23 + x 22 + x 16 + x 12 + x 11 + x 10 + x 8 + x 7 + x 5 + x 4 + x 2 + x + 1) polynomials. watchdog timers two independent watchdog timers (wdt1 and wdt2) with window support are provided. the watchdog timers are independent and have multiple clock source options to ensure system security. the watchdog uses a 32-bit timer with prescaler to generate the watchdog reset. when enabled, the watchdog timers must be written prior to time - out or within a window of time if window mode is enabled. failure to write the watchdog timer during the programmed timing window results in a watchdog timeout. the wdt1 or wdt2 flags are set on reset if a watchdog expiration caused the system reset. the clock source options for the watchdog timers wdt1 and wdt2 include: scaled system clock real-time clock power management clock a third watchdog timer (wdt3) is provided for recovery from runaway code or system unresponsiveness. this recovery watchdog uses a 16-bit timer to generate the watchdog reset. when enabled, this watchdog must be written prior to timeout, resulting in a watchdog timeout. the wdt3 flag is set on reset if a watchdog expiration caused the system reset. the clock source for the recov - ery watchdog is the 8khz nano ring, and the granularity of the timeout period is intended only for system recovery. programmable timers six 32-bit timers provide timing, capture/compare, or gen - eration of pulse-width modulated (pwm) signals. each of the 32-bit timers can also be split into two 16-bit timers, enabling 12 standard 16-bit timers. 32-bit timer features: 32-bit up/down autoreload programmable 16-bit prescaler pwm output generation capture, compare, and capture/compare capability gpios can be assigned as external timer inputs, clock gating or capture, limited to an input frequency of 1/4 of the peripheral clock frequency timer output pin configurable as 2x 16-bit general purpose timers timer interrupt figure 4. timer block diagram, 32-bit mode timer control register 32-bit timer (with prescaler) 32-bit compare register 32-bit pwm/compare compare compare interrupt pwm and timer output control time interrupt register apb bus apb clock timerinterrupt timer output timer input 32-bit timer block www.maximintegrated.com maxim integrated 21 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
serial peripheralsusb controller the integrated usb slave controller is compliant with the full-speed (12mb/s) usb 2.0 specification. the integrated usb physical interface (phy) reduces board space and system cost. an integrated voltage regulator enables smart switching between the main supply and v ddb when connected to a usb host controller. the usb controller supports dma for the endpoint buf - fers. a total of 7 endpoint buffers are supported with con - figurable selection of in or out in addition to endpoint 0. an external 32khz crystal or clock source is required for usb operation, even if the rtc function is not used. although the usb timing is derived from the internal 96mhz oscillator, the default accuracy is not sufficient for usb operation. periodic firmware adjustments of the 96mhz oscillator, using the 32khz timebase as a reference, are necessary to comply with the usb timing requirements. i 2 c master and slave ports the i 2 c interface is a bidirectional, two-wire serial bus that provides a medium-speed communications network. it can operate as a one-to-one, one-to-many or many- to-many communications medium. three i 2 c master engines and one i 2 c-selectable slave engine interface to a wide variety of i 2 c-compatible peripherals. these engines support both standard-mode and fast-mode i 2 c standards. the slave engine shares the same i/o port as the master engines and is selectable through the i/o configuration settings. it provides the following features: master or slave mode operation supports standard (7-bit) addressing or 10-bit addressing support for clock stretching to allow slower slave devices to operate on higher speed busses multiple transfer rates ? standard-mode: 100kbps ? fast-mode: 400kbps internal filter to reject noise spikes receiver fifo depth of 16 bytes transmitter fifo depth of 16 bytes serial peripheral interfacemaster the spi master-mode-only (spim) interface operates independently in a single or multiple slave system and is fully accessible to the user application. the spi ports provide a highly configurable, flexible, and efficient interface to communicate with a wide variety of spi slave devices. the three spi master ports (spi0, spi1, spi2) support the following features: spi modes (0, 3) for single-bit communication 3- or 4-wire mode for single-bit slave device commu - nication full-duplex operation in single-bit, 4-wire mode dual and quad i/o supported up to 5 slave select lines per port up to 2 slave ready lines programmable interface timing programmable sck frequency and duty cycle high-speed ahb access to transmit and receive using 32-byte fifos ss assertion and deassertion timing with respect to leading/trailing sck edge serial peripheral interfaceslave the spi slave (spis) port provide a highly configurable, flexible, and efficient interface to communicate with a wide variety of spi master devices. the spi slave interface supports the following features: supports spi modes 0 and 3 full-duplex operation in single-bit, 4-wire mode slave select polarity fixed (active low) dual and quad i/o supported high-speed ahb access to transmit and receive using 32-byte fifos four interrupts to monitor fifo levels serial peripheral interface execute in place (spix) master the spi execute in place (spix) master allows the cpu to transparently execute instructions stored in an external spi flash. instructions fetched through the spix master are cached just like instructions fetched from internal program memory. the spix master can also be used to access large amounts of external static data that would otherwise reside in internal data memory. www.maximintegrated.com maxim integrated 22 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
uart all four universal asynchronous receiver-transmitter (uart) interfaces support full-duplex asynchronous com - munication with optional hardware flow control (hfc) modes to prevent data overruns. if hfc mode is enabled on a given port, the system uses two extra pins to imple - ment the industry standard request to send (rts) and clear to send (cts) methodology. each uart is individu - ally programmable. 2-wire interface or 4-wire interface with flow control 32-byte send/receive fifo full-duplex operation for asynchronous data transfers programmable interrupt for receive and transmit independent baud-rate generator programmable 9th bit parity support multidrop support start/stop bit support hardware flow control using rts/cts maximum baud rate 1843.2kb trust protection unit (tpu) (max32631 only) the tpu enhances cryptographic data security for valu - able intellectual property (ip) and data. a high-speed, dedicated, hardware-based math accelerator (maa) per - forms mathematical computations that support strong cryptographic algorithms including: aes-128 aes-192 aes-256 1024-bit dsa 2048-bit (crt) the device provides a pseudo-random number genera - tor that can be used to create cryptographic keys for any application. a user-selectable entropy source further increases the randomness and key strength. the secure bootloader protects against unauthorized access to program memory. peripheral management unit (pmu) the pmu is a dma-based link list processing engine that performs operations and data transfers involving memory and/or peripherals in the advanced peripheral bus (apb) and advanced high-performance bus (ahb) peripheral memory space while the main cpu is in a sleep state. this allows low-overhead peripheral operations to be performed without the cpu, significantly reducing overall power consumption. using the pmu with the cpu in a sleep state provides a lower noise environment critical for obtaining optimum adc performance. key features of the pmu engine include: six independent channels with round-robin schedul - ing allows for multiple parallel operations programmed using sram-based pmu op codes pmu action can be initiated from interrupt conditions from peripherals without cpu integrated ahb bus master coprocessor-like state machine additional documentation engineers must have the following documents to fully use this device: this data sheet, containing pin descriptions, feature overviews, and electrical specifications the device-appropriate user guide, containing detailed information and programming guidelines for core features and peripherals errata sheets for specific revisions noting deviations from published specifications for information regarding these documents, visit technical support at support.maximintegrated.com/micro. development and technical support contact technical support for information about highly versatile, affordable development tools, available from maxim integrated and third-party vendors. evaluation kits software development kit compilers integrated development environments (ides) usb interface modules for programming and debugging for technical support, go to support.maximintegrated. com/micro www.maximintegrated.com maxim integrated 23 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
table 1. general-purpose i/o matrix primary function secondary function tertiary function quater- nary func- tion pulse train timer input gpio inter- rupt p0.0 uart0a_rx uart0b_tx pt_pt0 timer_tmr0 gpio_int(p0) p0.1 uart0a_tx uart0b_rx pt_pt1 timer_tmr1 gpio_int(p0) p0.2 uart0a_cts uart0b_rts pt_pt2 timer_tmr2 gpio_int(p0) p0.3 uart0a_rts uart0b_cts pt_pt3 timer_tmr3 gpio_int(p0) p0.4 spim0a_sck pt_pt4 timer_tmr4 gpio_int(p0) p0.5 spim0a_mosi/sdio0 pt_pt5 timer_tmr5 gpio_int(p0) p0.6 spim0a_miso/sdio1 pt_pt6 timer_tmr0 gpio_int(p0) p0.7 spim0a_ss0 pt_pt7 timer_tmr1 gpio_int(p0) p1.0 spim1a_sck spix0a_sck pt_pt8 timer_tmr2 gpio_int(p1) p1.1 spim1a_mosi/sdio0 spix0a_sdio0 pt_pt9 timer_tmr3 gpio_int(p1) p1.2 spim1a_miso/sdio1 spix0a_sdio1 pt_pt10 timer_tmr4 gpio_int(p1) p1.3 spim1a_ss0 spix0a_ss0 pt_pt11 timer_tmr5 gpio_int(p1) p1.4 spim1a_sdio2 spix0a_sdio2 pt_pt12 timer_tmr0 gpio_int(p1) p1.5 spim1a_sdio3 spix0a_sdio3 pt_pt13 timer_tmr1 gpio_int(p1) p1.6 i2cm0a/s0a_sda pt_pt14 timer_tmr2 gpio_int(p1) p1.7 i2cm0a/s0a_scl pt_pt15 timer_tmr3 gpio_int(p1) p2.0 uart1a_rx uart1b_tx pt_pt0 timer_tmr4 gpio_int(p2) p2.1 uart1a_tx uart1b_rx pt_pt1 timer_tmr5 gpio_int(p2) p2.2 uart1a_cts uart1b_rts pt_pt2 timer_tmr0 gpio_int(p2) p2.3 uart1a_rts uart1b_cts pt_pt3 timer_tmr1 gpio_int(p2) p2.4 spim2a_sck pt_pt4 timer_tmr2 gpio_int(p2) p2.5 spim2a_mosi/sdio0 pt_pt5 timer_tmr3 gpio_int(p2) p2.6 spim2a_miso/sdio1 pt_pt6 timer_tmr4 gpio_int(p2) p2.7 spim2a_ss0 pt_pt7 timer_tmr5 gpio_int(p2) p3.0 uart2a_rx uart2b_tx pt_pt8 timer_tmr0 gpio_int(p3) p3.1 uart2a_tx uart2b_rx pt_pt9 timer_tmr1 gpio_int(p3) p3.2 uart2a_cts uart2b_rts pt_pt10 timer_tmr2 gpio_int(p3) p3.3 uart2a_rts uart2b_cts pt_pt11 timer_tmr3 gpio_int(p3) p3.4 i2cm1a/s0b_sda spim2a_ss1 pt_pt12 timer_tmr4 gpio_int(p3) applications information www.maximintegrated.com maxim integrated 24 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
table 1. general-purpose i/o matrix (continued) primary function secondary function tertiary function quater- nary func- tion pulse train timer input gpio inter- rupt p3.5 i2cm1a/s0b_scl spim2a_ss2 pt_pt13 timer_tmr5 gpio_int(p3) p3.6 spim1a_ss1 spix_ss1 pt_pt14 timer_tmr0 gpio_int(p3) p3.7 spim1a_ss2 spix_ss2 pt_pt15 timer_tmr1 gpio_int(p3) p4.0 owm_i/o spim2a_sr0 pt_pt0 timer_tmr2 gpio_int(p4) p4.1 owm_pupen spim2a_sr1 pt_pt1 timer_tmr3 gpio_int(p4) p4.2 spim0a_sdio2 spis0a_sdio2 pt_pt2 timer_tmr4 gpio_int(p4) p4.3 spim0a_sdio3 spis0a_sdio3 pt_pt3 timer_tmr5 gpio_int(p4) p4.4 spim0a_ss1 spis0a_sclk pt_pt4 timer_tmr0 gpio_int(p4) p4.5 spim0a_ss2 spis0a_mosi/sdio0 pt_pt5 timer_tmr1 gpio_int(p4) p4.6 spim0a_ss3 spis0a_miso/sdio1 pt_pt6 timer_tmr2 gpio_int(p4) p4.7 spim0a_ss4 spis0a_ssel pt_pt7 timer_tmr3 gpio_int(p4) p5.0 spim2b_sck pt_pt8 timer_tmr4 gpio_int(p5) p5.1 spim2b_mosi/sdio0 pt_pt9 timer_tmr5 gpio_int(p5) p5.2 spim2b_miso/sdio1 pt_pt10 timer_tmr0 gpio_int(p5) p5.3 spim2b_ss0 uart3a_rx uart3b_tx pt_pt11 timer_tmr1 gpio_int(p5) p5.4 spim2b_sdio2 uart3a_tx uart3b_rx pt_pt12 timer_tmr2 gpio_int(p5) p5.5 spim2b_sdio3 uart3a_cts uart3b_rts pt_pt13 timer_tmr3 gpio_int(p5) p5.6 spim2b_sr uart3a_rts uart3b_cts pt_pt14 timer_tmr4 gpio_int(p5) p5.7 i2cm2a/s0c_sda spim2b_ss1 pt_pt15 timer_tmr5 gpio_int(p5) p6.0 i2cm2a/s0c_scl spim2b_ss2 pt_pt0 timer_tmr0 gpio_int(p6) p6.1 spim2c_sck spis0b_sck pt_pt1 timer_tmr1 gpio_int(p6) p6.2 spim2c_mosi/sdio0 spis0b_mosi/sdio0 pt_pt2 timer_tmr2 gpio_int(p6) p6.3 spim2c_miso/sdio1 spis0b_miso/sdio1 pt_pt3 timer_tmr3 gpio_int(p6) p6.4 spim2c_ss0 spis0b_ssel pt_pt4 timer_tmr4 gpio_int(p6) p6.5 spim2c_sdio2 spis0b_sdio2 pt_pt5 timer_tmr5 gpio_int(p6) p6.6 spim2c_sdio3 spis0b_sdio3 pt_pt6 timer_tmr0 gpio_int(p6) p6.7 spim2c_sr0 i2cm2b/se_sda pt_pt7 timer_tmr1 gpio_int(p6) www.maximintegrated.com maxim integrated 25 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
table 1. general-purpose i/o matrix (continued) primary function secondary function tertiary function quater- nary func- tion pulse train timer input gpio inter- rupt p7.0 spim2c_ss1 i2cm2b/se_scl pt_pt8 timer_tmr2 gpio_int(p7) p7.1 spim2c_ss2 i2cm1b/sd_sda pt_pt9 timer_tmr3 gpio_int(p7) p7.2 spim2c_sr1 i2cm1b/sd_scl pt_pt10 timer_tmr4 gpio_int(p7) p7.3 spis0c_sck i2cm2c/sg_sda pt_pt11 timer_tmr5 gpio_int(p7) p7.4 spis0c_mosi/sdio0 i2cm2c/sg_scl pt_pt12 timer_tmr0 gpio_int(p7) p7.5 spis0c_miso/sdio1 pt_pt13 timer_tmr1 gpio_int(p7) p7.6 spis0c_ss0 pt_pt14 timer_tmr2 gpio_int(p7) p7.7 spis0c_sdio2 i2cm1c/sf_sda pt_pt15 timer_tmr3 gpio_int(p7) p8.0 spis0c_sdio3 i2cm1c/sf_scl pt_pt0 timer_tmr4 gpio_int(p8) p8.1 pt_pt1 timer_tmr5 gpio_int(p8) + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. part flash sram trust protection unit (tpu) pin-package max32630iwg+ 2mb 512kb no 100 wlp max32631iwg+ 2mb 512kb yes 100 wlp max32630iwg+t 2mb 512kb no 100 wlp max32631iwg+t 2mb 512kb yes 100 wlp ordering information www.maximintegrated.com maxim integrated 26 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables downloaded from: http:///
revision number revision date description pages changed 0 3/16 initial release revision history maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. ? 2016 maxim integrated products, inc. 27 max32630/max32631 ultra-low power, high-performance cortex-m4f microcontroller for wearables for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///

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